The present application relates to capacitor fabrication, and more particularly, to the formation of high density capacitors using nanostructures.
Capacitors are important components in memory, logic and analog circuits. Due to the limitation of capacitance per unit area, capacitors always occupy a considerable chip area in a whole circuit layout. As integrated circuitry density has increased, the available die area for capacitors is decreasing. The decreased capacitor area in a denser circuit makes it more difficult to include capacitors having sufficiently high capacitance. Therefore, there remains a need for structures and methods that can increase capacitance for a fixed capacitor area on a chip.